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june 2016 docid025994 rev 2 1 / 35 this is information on a product in full production. www.st.com oa1zha, oa2zha, OA4ZHA high precision 5 v zero drift, low - power op amps datasheet - production data features very high accuracy and stability: offset voltage 5 v max at 25 c, 8 v over full temperature range ( - 40 c to 125 c) rail - to - rail input and output low supply voltage: 1.8 - 5.5 v low power consumption: 40 a max. at 5 v gain bandwidth product: 400 k hz high tolerance to esd: 4 kv hbm extended temperature range: - 40 to 125 c micro - packages: sc70 - 5, dfn8 2x2, and qfn16 3x3 benefits high precision operational amplifiers (op am ps) with no need for calibration accuracy virtually unaffected by temperature change applications wearable fitness and healthcare medical instrumentation description the oa1zh a, oa2zha, OA4ZHA series of low - power, high - precision op amps offer s very low input offset voltages with virtually zero drift. oa1zha, oa2zha, OA4ZHA are respectively the single, dual and quad op amp versions, with pinout compatible with industry standards. the oa1z ha, oa2zha, OA4ZHA series offers rail - to - rail input and output, excellent speed/power consumption ratio, and 400 khz gain bandwidth product, while consuming less than 40 a at 5 v. all devices also feature an ultra - low input bias current. the oa1zha, oa2zha, OA4ZHA family is the ideal choice for wearable, fitness and healthcare applications.
contents oa1zha, oa2zha, OA4ZHA 2 / 35 docid025994 rev 2 contents 1 package pin connections ................................ ................................ 3 2 absolute maximum ratings and operating conditions ................. 4 3 electrical characteristics ................................ ................................ 5 4 electrical characteristic curves ................................ .................... 11 5 application information ................................ ................................ 17 5.1 operation theory ................................ ................................ ............. 17 5.1.1 time domain ................................ ................................ ..................... 17 5.1.2 frequency domain ................................ ................................ ............ 18 5.2 operating voltages ................................ ................................ .......... 19 5.3 input pin voltage ranges ................................ ................................ .. 19 5.4 rail - to - rail input ................................ ................................ ............... 19 5.5 input offset voltage drift over temperature ................................ ....... 20 5.6 rail - to - rail output ................................ ................................ ............. 20 5.7 capacitive load ................................ ................................ ................ 21 5.8 pcb layout recommendations ................................ ......................... 21 5.9 optimized applicati on recommendation ................................ .......... 22 5.10 emi rejection ration (emirr) ................................ .......................... 22 5.11 application examples ................................ ................................ ...... 23 5.11.1 oxygen sensor ................................ ................................ ................. 23 5.11.2 precision instrumentation amplifier ................................ .................. 24 5.11.3 low - side current sensing ................................ ................................ .. 24 6 package information ................................ ................................ ..... 26 6.1 sc70 - 5 (or sot323 - 5) package information ................................ ... 27 6.2 miniso8 package information ................................ ......................... 28 6.3 dfn8 2x2 package information ................................ ....................... 29 6.4 qfn16 3x3 package information ................................ ..................... 31 7 ordering information ................................ ................................ ..... 33 8 revision history ................................ ................................ ............ 34
oa1zha, oa2zha, OA4ZHA package pin connections docid025994 rev 2 3 / 35 1 package pin connections figure 1 : pin connections for each package (top view) 1. the exposed pads of the dfn8 2x2 and the qfn16 3x3 can be connected to vcc - or left f loating.
absolute maximum ratings and operating conditions oa1zha, oa2zha, OA4ZHA 4 / 35 docid025994 rev 2 2 absolute maximum ratings and operating conditions table 1: absolute maximum ratings (amr) symbol parameter value unit v cc supply voltage (1) 6 v v id differential input voltage (2) v cc v in input voltage (3) (v cc - ) - 0.2 to (v cc+ ) + 0.2 i in input current (4) 10 ma t stg storage temperature - 65 to 150 c t j maximum junction temperature 150 r thja thermal resistance junction - to - ambient (5) (6) sc70 - 5 205 c/w miniso8 190 dfn8 2x2 57 qfn16 3x3 39 esd hbm: human body model (7) oa1zha only 4 kv mm: machine model (8) 300 v cdm: charged device model 1.5 kv qfn16 3x3 tbd latch - up immunity 200 ma notes: (1) all voltage values, except differential voltage, are with respect to network ground terminal. (2) the differential voltage is the non - inverting input terminal with respect to the inverting input terminal. (3) v cc - v in must not exceed 6 v, v in must not exceed 6 v. (4) input current must be limited by a resistor in series with the inputs. (5) r th are typical values. (6) short - circuits can cause excessive heating and destructive dissipation. (7) human body model: 100 pf disch arged through a 1.5 k resistor between two pins of the device, done for all couples of pin combinations with other pins floating. (8) machine model: a 200 pf cap is charged to the specified voltage, then discharged directly between two pins of the device w ith no external series resistor (internal resistor < 5 ), done for all couples of pin combinations with other pins floating. table 2: operating conditions symbol parameter value unit v cc supply voltage 1.8 to 5.5 v v icm common mode input voltage range (v cc - ) - 0.1 to (v cc+ ) + 0.1 t oper operating free air temperature range - 40 to 125 c
oa1zha, oa2zha, OA4ZHA electrical characteristics docid025994 rev 2 5 / 35 3 electrical characteristics table 3: electrical characteristics at vcc+ = 1.8 v with vcc - = 0 v, vicm = vcc/2, t = 25 c, and rl = 10 k connected to vcc/2 (unless otherwise specified) symbol parameter conditions min. typ. max. unit dc performance v io input offset voltage t = 25 c 1 5 v - 40 c < t < 125 c 8 v io /t input offset voltage drift (1) - 40 c < t < 125 c 10 30 nv/c i ib input bias current (v out = v cc /2) t = 25 c 50 200 (2) pa - 40 c < t < 125 c 300 (2) i io input offset current (v out = v cc /2) t = 25 c 100 400 (2) - 40 c < t < 125 c 600 (2) cmr common mode rejection ratio, 20 log (v icm /v io ), v ic = 0 v to v cc , v out = v cc /2, r l > 1 m t = 25 c 110 122 db - 40 c < t < 125 c 110 a vd large signal voltage gain, v out = 0.5 v to (v cc - 0.5 v) t = 25 c 118 135 - 40 c < t < 125 c 110 v oh high - level output voltage t = 25 c 30 mv - 40 c < t < 125 c 70 v ol low - level output voltage t = 25 c 30 - 40 c < t < 125 c 70 i out i sink (v out = v cc ) t = 25 c 7 8 ma - 40 c < t < 125 c 6 i source (v out = 0 v) t = 25 c 5 7 - 40 c < t < 125 c 4 i cc supply current (per amplifier ) , v out = v cc /2, r l > 1 m) t = 25 c 28 40 a - 40 c < t < 125 c 40 ac performance gbp gain bandwidth product r l = 10 k, c l = 100 pf 400 khz f u unity gain frequency 300 ?m phase margin 55 degrees g m gain margin 17 db sr slew rate (3) 0.17 v/s t s setting time to 0.1 %, v in = 1 vp - p, r l = 10 k, c l = 100 pf 50 s e n equivalent input noise voltage f = 1 khz 60 nv/hz f = 10 khz 60 c s channel separation f = 100 hz 120 db t init initialization time t = 25 c 50 s - 40 c < t < 125 c 100
electrical characteristics oa1zha, oa2zha, OA4ZHA 6 / 35 docid025994 rev 2 notes: (1) see section 5.5: "input offset voltage drift over temperature" . input offset measurements are performed on x100 gain configuration. the amplifiers and the gain setting resistors are at the same temperature. (2) guaranteed by design (3) slew rate value is calculated as the average between positive and negative slew rates.
oa1zha, oa2zha, OA4ZHA electrical characteristics docid025994 rev 2 7 / 35 table 4 : electrical characteristics at vcc+ = 3.3 v with vcc - = 0 v, vicm = vcc/2, t = 25 c, and rl = 10 k connected to vcc/2 (unless otherwise specified) symbol parameter conditions min. typ. max. unit dc performance v io input offset voltage t = 25 c 1 5 v - 40 c < t < 125 c 8 v io /t input offset voltage drift (1) - 40 c < t < 125 c 10 30 nv/c i ib input bias current (v out = v cc /2) t = 25 c 60 200 (2) pa - 40 c < t < 125 c 300 (2) i io input offset current (v out = v cc /2) t = 25 c 120 400 (2) - 40 c < t < 125 c 600 (2) cmr common mode rejection ratio, 20 log (v icm /v io ), v ic = 0 v to v cc , v out = v cc /2, r l > 1 m t = 25 c 115 128 db - 40 c < t < 125 c 115 a vd large signal voltage gain, v out = 0.5 v to (v cc - 0.5 v) t = 25 c 118 135 - 40 c < t < 125 c 110 v oh high - level output voltage t = 25 c 30 mv - 40 c < t < 125 c 70 v ol low - level output voltage t = 25 c 30 - 40 c < t < 125 c 70 i out i sink (v out = v cc ) t = 25 c 15 18 ma - 40 c < t < 125 c 12 i source (v out = 0 v) t = 25 c 14 16 - 40 c < t < 125 c 10 i cc supply current (per amplifier ) , v out = v cc /2, r l > 1 m) t = 25 c 29 40 a - 40 c < t < 125 c 40 ac performance gbp gain bandwidth product r l = 10 k, c l = 100 pf 400 khz f u unity gain frequency 300 ?m phase margin 56 degrees g m gain margin 19 db sr slew rate (3) 0.19 v/s t s setting time to 0.1 %, v in = 1 vp - p, r l = 10 k, c l = 100 pf 50 s e n equivalent input noise voltage f = 1 khz 40 nv/hz f = 10 khz 40 c s channel separation f = 100 hz 120 db t init initialization time t = 25 c 50 s - 40 c < t < 125 c 100
electrical characteristics oa1zha, oa2zha, OA4ZHA 8 / 35 docid025994 rev 2 notes: (1) see section 5.5: "input offset voltage drift over temperature" . input offset measurements are performed on x100 gain configuration. the amplifiers and the gain setting resistors are at the same temperature. (2) guaranteed by design (3) slew rate value is calculated as the average between positive and negative slew rates.
oa1zha, oa2zha, OA4ZHA electrical characteristics docid025994 rev 2 9 / 35 table 5: electrical characteristics at vcc+ = 5 v with vcc - = 0 v, vicm = vcc/2, t = 25 c, and rl = 10 k connected to vcc/2 (unless otherwise specified) symbol parameter conditions min. typ. max. unit dc performance v io input offset voltage t = 25 c 1 5 v - 40 c < t < 125 c 8 v io /t input offset voltage drift (1) - 40 c < t < 125 c 10 30 nv/c i ib input bias current (v out = v cc /2) t = 25 c 70 200 (2) pa - 40 c < t < 125 c 300 (2) i io input offset current (v out = v cc /2) t = 25 c 140 400 (2) - 40 c < t < 125 c 600 (2) cmr common mode rejection ratio, 20 log (v icm /v io ), v ic = 0 v to v cc , v out = v cc /2, r l > 1 m t = 25 c 115 136 db - 40 c < t < 125 c 115 svr supply voltage rejection ratio, 20 log (v cc /v io ), v cc = 1.8 v to 5.5 v, v out = v cc /2, r l > 1 m t = 25 c 120 140 - 40 c < t < 125 c 120 a vd large signal voltage gain, v out = 0.5 v to (v cc - 0.5 v) t = 25 c 120 135 - 40 c < t < 125 c 110 emirr (3) emi rejection rate = - 20 log (v rfpeak /v io ) v rf = 100 mv p , f = 400 mhz 84 v rf = 100 mv p , f = 900 mhz 87 v rf = 100 mv p , f = 1800 mhz 90 v rf = 100 mv p , f = 2400 mhz 91 v oh high - level output voltage t = 25 c 30 mv - 40 c < t < 125 c 70 v ol low - level output voltage t = 25 c 30 - 40 c < t < 125 c 70 i out i sink (v out = v cc ) t = 25 c 15 18 ma - 40 c < t < 125 c 14 i source (v out = 0 v) t = 25 c 14 17 - 40 c < t < 125 c 12 i cc supply current (per amplifier ) , v out = v cc /2, r l > 1 m) t = 25 c 31 40 a - 40 c < t < 125 c 40 ac performance gbp gain bandwidth product r l = 10 k, c l = 100 pf 400 khz f u unity gain frequency 300 ?m phase margin 53 degrees g m gain margin 19 db sr slew rate (4) 0.19 v/s
electrical characteristics oa1zha, oa2zha, OA4ZHA 10 / 35 docid025994 rev 2 symbol parameter conditions min. typ. max. unit t s setting time to 0.1 %, v in = 100 mvp - p, r l = 10 k, c l = 100 pf 10 s e n equivalent input noise voltage f = 1 khz 37 nv/hz f = 10 khz 37 c s channel separation f = 100 hz 120 db t init initialization time t = 25 c 50 s - 40 c < t < 125 c 100 notes: (1) see section 5.5: "input offset voltage drift over temperature" . input offset measurements are performed on x100 gain configuration. the amplifiers and the gain setting resistors are at the same temperature. (2) guaranteed by design (3) tested on sc70 - 5 package (4) slew rate value is calculated as the average between positive and negative slew rates.
oa1zha, oa2zha, OA4ZHA electrical characteristic curves docid025994 rev 2 11 / 35 4 electrical characteristic curves figure 2 : supply current vs. supply voltage figure 3 : input offset voltage distribution at vcc = 5 v figure 4 : input offset voltage distribution at vcc = 3.3 v figure 5 : input offset voltage distribution at vcc = 1.8 v figure 6 : vio temperature co - efficient distribution ( - 40 c to 25 c) figure 7 : vio temperature co - efficient di stribution (25 c to 125 c)
electrical characteristic curves oa1zha, oa2zha, OA4ZHA 12 / 35 docid025994 rev 2 figure 8 : input offset voltage vs. supply voltage figure 9 : input offset voltage vs. input common - mode at vcc = 1.8 v figure 10 : input offset voltage vs. input common - mode at vcc = 2.7 v figure 11 : input offset voltage vs. input common - mode at vcc = 5.5 v figure 12 : input offset voltage vs. temperature figure 13 : voh vs. supply voltage
oa1zha, oa2zha, OA4ZHA electrical characteristic curves docid025994 rev 2 13 / 35 figure 14 : vol vs. supply voltage figure 15 : output current vs. output voltage at vcc = 1.8 v figure 16 : output current vs. output voltage at vcc = 5.5 v figure 17 : input bias current vs. common mode at vcc = 5 v figure 18 : input bias current vs. common - mode at vcc = 1.8 v figure 19 : input bias current vs. temperature at vcc = 5 v
electrical characteristic curves oa1zha, oa2zha, OA4ZHA 14 / 35 docid025994 rev 2 figure 20 : bode diagram at vcc = 1.8 v figure 21 : bode diagram at vcc = 2.7 v figure 22 : bode diagram at vcc = 5.5 v figure 23 : open loop gain vs. frequency figure 24 : positive slew rate vs. supply voltage figure 25 : negative slew rate vs. supply voltage
oa1zha, oa2zha, OA4ZHA electrical characteristic curves docid025994 rev 2 15 / 35 figure 26 : 0.1 hz to 10 hz noise figure 27 : noise vs. frequency figure 28 : noise vs. frequency and temperature figure 29 : output overshoot vs. load capacitance figure 30 : small signal figure 31 : large signal
electrical characteristic curves oa1zha, oa2zha, OA4ZHA 16 / 35 docid025994 rev 2 figure 32 : positive overvoltage recovery at vcc = 1.8 v figure 33 : positive overvoltage recovery at vcc = 5 v figure 3 4 : negative overvoltage recovery at vcc = 1.8 v figure 35 : negative overvoltage recovery at vcc = 5 v figure 36 : psrr vs. frequency figure 37 : output impedance vs. frequency
oa1zha, oa2zha, OA4ZHA application info rmation docid025994 rev 2 17 / 35 5 application information 5.1 operation theory the oa1zha, oa2zha and OA4ZHA are high precision cmos op amp. they achieve a low offset drift and no 1/f noise thanks to their chopper architecture. chopper - stabilized amps constantly correct low - frequency errors across the inputs of the amplifier. chopper - stabilized amplifiers can be explained with respect to: time domain frequency domain 5.1.1 time domain the basis of the chopper amplifier is realized in two steps. these steps a re synchronized thanks to a clock running at 400 khz. figure 38 : block diagram in the time domain (step 1) figure 39 : block diagram in the time domain (step 2) figure 38: "block diagram in the time domain (step 1)" shows step 1, the first clock cycle, where v io is amplified in the normal way. figure 39: "block diagram in the time domain (step 2)" shows step 2, the second clock cycle, where chop1 and chop2 swap paths. at this time, the v io is amplified in a reverse way as compared to step 1. at the end of these two steps, the average v io is close to zero. the a2( f) amplifier has a small impact on the v io because the v io is expressed as the input offset and is consequently divided by a1(f).
application information oa1zha, oa2zha, OA4ZHA 18 / 35 docid025994 rev 2 in the time domain, the offset part of the output signal before filtering is shown in figu re 40: "vio cancellation principle" . figure 40 : vio cancellation principle the low pass filter averages the output value resulting in the cancellation of the v io offset. the 1/f noise can be considered as an offset in low freque ncy and it is canceled like the v io , thanks to the chopper technique. 5.1.2 frequency domain the frequency domain gives a more accurate vision of chopper - stabilized amplifier architecture. figure 41 : block diagram in the frequency domain the modulation technique transposes the signal to a higher frequency where there is no 1/f noise, and demodulate it back after amplification. 1. according to figure 41: "block diagram in the frequency domain" , the input signal v in is modulated once (chop1) so all the input signal is transposed to the high frequency domain. 2. the amplifier adds its own error (v io (output offset voltage) + t he noise v n (1/f noise)) to this modulated signal. 3. this signal is then demodulated (chop2), but since the noise and the offset are modulated only once, they are transposed to the high frequency, leaving the output signal of the amplifier without any offse t and low frequency noise. consequently, the input signal is amplified with a very low offset and 1/f noise. 4. to get rid of the high frequency part of the output signal (which is useless) a low pass filter is implemented. to further suppress the remaining ripple down to a desired level, another low pass filter may be added externally on the output of the oa1zha, oa2zha and OA4ZHA device.
oa1zha, oa2zha, OA4ZHA application information docid025994 rev 2 19 / 35 5.2 operating voltages oa1zha, oa2zha and OA4ZHA cmos op amp can operate from 1.8 to 5.5 v. the parameters are fully specified for 1.8 v, 3.3 v, and 5 v power supplies. however, the parameters are very stable in the full ? ? range and several characterization curves show the oa1 zha, oa2zha and OA4ZHA op amp characteristics at 1.8 v and 5.5 v. additionally, the main specifications are guaranteed in extended temperature ranges from - 40 to 125 c. 5.3 input pin voltage ranges oa1zha, oa2zha and OA4ZHA cmos op amp can operate from 1.8 to 5.5 v. the parameters are fully specified for 1.8 v, 3.3 v, and have internal esd diode protection on the inputs. these diodes are connected between the input a nd each supply rail to protect the input mosfets from electrical discharge. if the input pin voltage exceeds the power supply by 0.5 v, the esd diodes become conductive and excessive current can flow through them. without limitation this over current can d amage the device. in this case, it is important to limit the current to 10 ma, by adding resistance on the input pin, as described in figure 42: "input current limitation" . figure 42 : input current limitation 5.4 rail - to - rail input oa1zha, oa2zha and OA4ZHA cmos op amp have a rail - to - rail input, and the input common mode range is extended from (v cc - ) - 0.1 v to (v cc + ) + 0.1 v.
application information oa1zha, oa2zha, OA4ZHA 20 / 35 docid025994 rev 2 5.5 input offset voltage drift over temperature the maximum input voltage drift variation over temperature is defined as the offset v ariation related to the offset value measured at 25 c. the operational amplifier is one of the main circuits of the signal conditioning chain, and the amplifier input offset is a major contributor to the chain accuracy. the signal chain accuracy at 25 c can be compensated during production at application level. the maximum input voltage drift over temperature enables the system designer to anticipate the effect of temperature variations. the maximum input voltage drift over temperature is computed using equation 1 . equation 1 where t = - 40 c and 125 c. the oa1zha, oa2zha and OA4ZHA cmos datasheet maximum value is guaranteed by measurements on a representative sample size ensuring a c pk (process capability index) greater than 1.3. 5.6 rail - to - rail output the operational amplifier output levels can go close to the rails: to a maximum of 30 mv above and below the rail when connected to a 10 k resistive load to v cc /2. ? v i o ? t ma x v i o t v i o 2 5 C t 2 5 c C = c
oa1zha, oa2zha, OA4ZHA application information docid025994 rev 2 21 / 35 5.7 capacitive load driving large capacitive loads can cause stability problems. increasing the load capaci tance produces gain peaking in the frequency response, with overshoot and ringing in the step response. it is usually considered that with a gain peaking higher than 2.3 db an op amp might become unstable. generally, the unity gain configuration is the wor st case for stability and the ability to drive large capacitive loads. figure 43: "stability criteria with a serial resistor at vdd = 5 v" and figure 44: "stability criteria with a serial re sistor at vdd = 1.8 v" show the serial resistor that must be added to the output, to make a system stable. figure 45: "test configuration for riso" shows the test configuration using an isolation resistor, r iso . figure 43 : stability criteria with a serial resistor at vdd = 5 v figure 44 : stability criteria with a serial resistor at vdd = 1.8 v figure 45 : test configuration for riso 5.8 pcb layout recommendations particular attention must be paid to the layout of the pcb, tracks connected to the amplifier, load, and power supply. the power and groun d traces are critical as they must provide adequate energy and grounding for all circuits. good practice is to use short and wide pcb traces to minimize voltage drops and parasitic inductance. in addition, to minimize parasitic impedance over the entire su rface, a multi - via technique that connects the bottom and top layer ground planes together in many locations is often used. the copper traces that connect the output pins to the load and supply pins should be as wide as possible to minimize trace resistanc e.
application information oa1zha, oa2zha, OA4ZHA 22 / 35 docid025994 rev 2 5.9 optimized application recommendation oa1zha, oa2zha and OA4ZHA cmos op amp are based on chopper architecture. as they are switched devices, it is s trongly recommended to place a 0.1 f capacitor as close as possible to the supply pins. a good decoupling has several advantages for an application. first, it helps to reduce electromagnetic interference. due to the modulation of the chopper, the decoupli ng capacitance also helps to reject the small ripple that may appear on the output. oa1zha, oa2zha and OA4ZHA cmos op amp have been optimized for use with 10 k in the feedback loop. with this, or a higher value of resistance, these devices offer the best performance. 5.10 emi rejection ration (emirr) the electromagnetic interference (emi) rejection ratio, or emirr, describes the emi immunity of operational amplifiers . an adverse effect that is common to many op amp is a change in the offset voltage as a result of rf signal rectification. oa1zha, oa2zha and OA4ZHA cmos op amp have been specially designed to minimize susceptibility to emirr and show an extremely good se nsitivity. figure 46: "emirr on in+ pin" shows the emirr in+ of the oa1zha, oa2zha and OA4ZHA measured from 10 mhz up to 2.4 ghz. figure 46 : emirr on in+ pin
oa1zha, oa2zha, OA4ZHA application information docid025994 rev 2 23 / 35 5.11 application examples 5.11.1 oxygen sensor the electrochemical sensor creates a current proportional to the concentration of the gas being measured. this current is converted into voltage thanks to r resistance. this voltage is then amplified by oa1zha, oa2zha and OA4ZHA cmos op amp (see figure 47: "oxygen sensor principle schematic" ). figure 47 : oxygen sensor principle schematic the output voltage is calculated using equation 2 : equation 2 as the current delivered by the o2 sensor is extremely low, the impact of the v io can become significant with a traditional operational amplifier. the use of the chopper amplifier of the oa1zha, oa2zha and OA4ZHA is perfect for this application. in additio n, using oa1zha, oa2zha and OA4ZHA op amp for the o2 sensor application ensures that the measurement of o2 concentration is stable even at different temperature thanks to a very good ?v io /?t. v ou t i r v i o r 2 r 1 1 + C =
application information oa1zha, oa2zha, OA4ZHA 24 / 35 docid025994 rev 2 5.11.2 precision instrumentation amplifier the instrumentation amplifier uses three op amp. the circuit, shown in figure 48: "precision instrumentation amplifier schematic" , exhibits h igh input impedance, so that the source impedance of the connected sensor has no impact on the amplification. figure 48 : precision instrumentation amplifier schematic the gain is set by tuning the r g resistor. with r1 = r2 and r 3 = r4, the output is given by equation 3 . equation 3 the matching of r1, r2 and r3, r4 is important to ensure a good common mode rejection ratio (cmr). 5.11.3 low - side current sensing power management mechanisms are found in most electronic systems. current sensing is useful for protecting applications. the low - side current sensing method con sists of placing a sense resistor between the load and the circuit ground. the resulting voltage drop is amplified using oa1zha, oa2zha and OA4ZHA cmos op amp (see figure 49: "low - side current sensing schematic" ). figure 49 : low - side current sensing schematic
oa1zha, oa2zha, OA4ZHA application information docid025994 rev 2 25 / 35 v out can be expressed as follows: equation 4 assuming that r f2 = r f1 = r f and r g2 = r g1 = r g , equation 4 can be simplified as follows: equation 5 the m ain advantage of using the chopper of the oa1zha, oa2zha and OA4ZHA, for a low - side current sensing, is that the errors due to v io and i io are extremely low and may be neglected. therefore, for the same accuracy, the shunt resistor can be chosen with a low er value, resulting in lower power dissipation, lower drop in the ground path, and lower cost. particular attention must be paid on the matching and precision of r g1 , r g2 , r f1 , and r f2 , to maximize the accuracy of the measurement. v ou t r s hun t i 1 r g 2 r g 2 r f 2 + 1 r f 1 r g 1 C i p r g 2 r f 2 r g 2 r f 2 1 r f 1 r g 1 l n r f 1 v i o 1 r f 1 r g 1 + C C + = + + + v o u t r s h un t i r f r g v i o 1 r f r g C r f i i o + = +
package information oa1zha, oa2zha, OA4ZHA 26 / 35 docid025994 rev 2 6 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specificat ions, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark.
oa1zha, oa2zha, OA4ZHA package information docid025994 rev 2 27 / 35 6.1 sc70 - 5 (or sot323 - 5) package information figure 50 : sc70 - 5 (or sot323 - 5) package outline table 6: sc70 - 5 (or sot323 - 5) mechanical data ref. dimensions millimeters inches min. typ. max. min. typ. max. a 0.80 1.10 0.032 0.043 a1 0.10 0.004 a2 0.80 0.90 1.00 0.032 0.035 0.039 b 0.15 0.30 0.006 0.012 c 0.10 0.22 0.004 0.009 d 1.80 2.00 2.20 0.071 0.079 0.087 e 1.80 2.10 2.40 0.071 0.083 0.094 e1 1.15 1.25 1.35 0.045 0.049 0.053 e 0.65 0.025 e1 1.30 0.051 l 0.26 0.36 0.46 0.010 0.014 0.018 < 0 8 0 8 se a ting plane gauge plane dimensions in mm side view t o p view coplanar leads
package information oa1zha, oa2zha, OA4ZHA 28 / 35 docid025994 rev 2 6.2 miniso8 package information figure 51 : miniso8 package outline table 7: miniso8 mechanical data ref. dimensions millimeters inches min. typ. max. min. typ. max. a 1.1 0.043 a1 0 0.15 0 0.006 a2 0.75 0.85 0.95 0.030 0.033 0.037 b 0.22 0.40 0.009 0.016 c 0.08 0.23 0.003 0.009 d 2.80 3.00 3.20 0.11 0.118 0.126 e 4.65 4.90 5.15 0.183 0.193 0.203 e1 2.80 3.00 3.10 0.11 0.118 0.122 e 0.65 0.026 l 0.40 0.60 0.80 0.016 0.024 0.031 l1 0.95 0.037 l2 0.25 0.010 k 0 8 0 8 ccc 0.10 0.004
oa1zha, oa2zha, OA4ZHA package information docid025994 rev 2 29 / 35 6.3 dfn8 2x2 package information figure 52 : dfn8 2x2 package outline table 8: dfn8 2x2 mechanical data ref. dimensions millimeters inches min. typ. max. min. typ. max. a 0.51 0.55 0.60 0.020 0.022 0.024 a1 0.05 0.002 a3 0.15 0.006 b 0.18 0.25 0.30 0.007 0.010 0.012 d 1.85 2.00 2.15 0.073 0.079 0.085 d2 1.45 1.60 1.70 0.057 0.063 0.067 e 1.85 2.00 2.15 0.073 0.079 0.085 e2 0.75 0.90 1.00 0.030 0.035 0.039 e 0.50 0.020 l 0.425 0.017 ddd 0.08 0.003
package inform ation oa1zha, oa2zha, OA4ZHA 30 / 35 docid025994 rev 2 figure 53 : dfn8 2x2 recommended footprint
oa1zha, oa2zha, OA4ZHA package information docid025994 rev 2 31 / 35 6.4 qfn16 3x3 package information figure 54 : qfn16 3x3 package outline
package information oa1zha, oa2zha, OA4ZHA 32 / 35 docid025994 rev 2 table 9: qfn16 3x3 mechanical data ref. dimensions millimeters inches min. typ. max. min. typ. max. a 0.80 0.90 1.00 0.031 0.035 0.039 a1 0 0.05 0 0.002 a3 0.20 0.008 b 0.18 0.30 0.007 0.012 d 2.90 3.00 3.10 0.114 0.118 0.122 d2 1.50 1.80 0.059 0.071 e 2.90 3.00 3.10 0.114 0.118 0.122 e2 1.50 1.80 0.059 0.071 e 0.50 0.020 l 0.30 0.50 0.012 0.020 figure 55 : qfn16 3x3 recommended footprint
oa1zha, oa2zha, OA4ZHA ordering information docid025994 rev 2 33 / 35 7 ordering information table 10: order codes order code temperature range package packaging marking oa1zha22c - 40 to 125 c sc70 - 5 tape and reel k44 oa2zha34s miniso8 k208 oa2zha22q dfn8 2x2 k33 OA4ZHA33q qfn16 3x3 k193
revision history oa1zha, oa2zha, OA4ZHA 34 / 35 docid025994 rev 2 8 revision history table 11: document revision history date revision changes 04 - mar - 2014 1 initial release. 30 - jun - 2016 2 updated document layout removed device summary table from cover page and added information to table 10: "order codes" . section 6.4: "qfn16 3x3 package information" : added recommended footprint. added section 7: "ordering information" table 10: "order codes" : updated marking of miniso8 package.
oa1zha, oa2zha, OA4ZHA docid025994 rev 2 35 / 35 important notice C please read carefully stmicroelectronics nv and its subsidiaries (st) reserve the right to make changes, corrections, enhancements, modifications , and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant information on st products before placing orders. st products are sold pursuant to sts terms and conditions of sale in place at the time of or der acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and st assumes no liability for application assistance or the design of purchasers products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from t he information set forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2016 stmicroelectronics C all rights reserved

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